雑多なメモの置き場。主にLinuxやCygwin、プログラミングやPCなど。
雑多なメモの置き場。主にLinuxやCygwin、プログラミングやPCなど。
|
ページ更新: 2011-09-03 (土) (4222日前)
関連: ソフト/VMware, PC/QNAP TurboNAS (2009-11-23 新規作成) /proc/cpuinfo と cpuid の値を手持ちのCPUで調べたので、メモしておく。 目次 情報源 #bogomips:
flags: [編集]例 #OS は Debian 5.0.3、あるいは grml 2009.10 を用いた。 (QNAP TurboNAS TS-112 を除く) [編集]K6-2 (Dynabook Satellite 2140) #[編集]/proc/cpuinfo #/proc/cpuinfo
cpuid #$ cpuid eax in eax ebx ecx edx 00000000 00000001 68747541 444d4163 69746e65 00000001 0000058c 00000000 00000000 008021bf 80000000 80000005 00000000 00000000 00000000 80000001 0000068c 00000000 00000000 808029bf 80000002 2d444d41 7428364b 3320296d 72702044 80000003 7365636f 00726f73 00000000 00000000 80000004 00000000 00000000 00000000 00000000 80000005 00000000 02800140 20020220 20020220 Vendor ID: "AuthenticAMD"; CPUID level 1 AMD-specific functions Version 0000058c: Family: 5 Model: 8 [K6-2 Model 8] Standard feature flags 008021bf: Floating Point Unit Virtual Mode Extensions Debugging Extensions Page Size Extensions Time Stamp Counter (with RDTSC and CR4 disable bit) Model Specific Registers with RDMSR & WRMSR Machine Check Exception COMPXCHG8B Instruction Global paging extension MMX instructions Generation: 6 Model: 8 Extended feature flags 808029bf: Floating Point Unit Virtual Mode Extensions Debugging Extensions Page Size Extensions Time Stamp Counter (with RDTSC and CR4 disable bit) Model Specific Registers with RDMSR & WRMSR Machine Check Exception COMPXCHG8B Instruction SYSCALL/SYSRET or SYSENTER/SYSEXIT instructions Global paging extension MMX instructions 3DNow instructions Processor name string: AMD-K6(tm) 3D processor L1 Cache Information: 4-KB Pages: Data TLB: associativity 2-way #entries 128 Instruction TLB: associativity 1-way #entries 64 L1 Data cache: size 32 KB associativity 2-way lines per tag 2 line size 32 L1 Instruction cache: size 32 KB associativity 2-way lines per tag 2 line size 32[編集] x86info #$ x86info x86info v1.21. Dave Jones 2001-2007 Feedback to <davej@redhat.com>. Found 1 CPU -------------------------------------------------------------------------- Family: 5 Model: 8 Stepping: 12 CPU Model : K6-2 (CXT core) Feature flags: fpu vme de pse tsc msr mce cx8 pge mmx Extended feature flags: fpu vme de pse tsc msr mce cx8 sep pge mmx 3dnow[編集] ARM: Marvell 6281 1.2GHz (QNAP TurboNAS TS-112) #(2011-09-03) Marvell - Products - Embedded Processors - Kirkwood Series
/proc/cpuinfo #/proc/cpuinfo
PentiumIII Coppermine #PC/Asustek CUBX, Debian 4.0.x [編集]/proc/cpuinfo #/proc/cpuinfo
cpuid #$ cpuid eax in eax ebx ecx edx 00000000 00000002 756e6547 6c65746e 49656e69 00000001 00000686 00000002 00000000 0383f9ff 00000002 03020101 00000000 00000000 0c040882 Vendor ID: "GenuineIntel"; CPUID level 2 Intel-specific functions: Version 00000686: Type 0 - Original OEM Family 6 - Pentium Pro Model 8 - Pentium III/Pentium III Xeon - internal L2 cache Stepping 6 Reserved 0 Brand index: 2 [Pentium III processor] Feature flags 0383f9ff: FPU Floating Point Unit VME Virtual 8086 Mode Enhancements DE Debugging Extensions PSE Page Size Extensions TSC Time Stamp Counter MSR Model Specific Registers PAE Physical Address Extension MCE Machine Check Exception CX8 COMPXCHG8B Instruction SEP Fast System Call MTRR Memory Type Range Registers PGE PTE Global Flag MCA Machine Check Architecture CMOV Conditional Move and Compare Instructions FGPAT Page Attribute Table PSE-36 36-bit Page Size Extension MMX MMX instruction set FXSR Fast FP/MMX Streaming SIMD Extensions save/restore SSE Streaming SIMD Extensions instruction set TLB and cache info: 01: Instruction TLB: 4KB pages, 4-way set assoc, 32 entries 02: Instruction TLB: 4MB pages, 4-way set assoc, 2 entries 03: Data TLB: 4KB pages, 4-way set assoc, 64 entries 82: 2nd-level cache: 256KB, 8-way set assoc, 32 byte line size 08: 1st-level instruction cache: 16KB, 4-way set assoc, 32 byte line size 04: Data TLB: 4MB pages, 4-way set assoc, 8 entries 0c: 1st-level data cache: 16KB, 4-way set assoc, 32 byte line size[編集] x86info #$ x86info
x86info v1.18. Dave Jones 2001-2006
Feedback to <davej@redhat.com>.
Found 1 CPU
--------------------------------------------------------------------------
Found unknown cache descriptors: 01 02 03 04 08 0c 82
Family: 6 Model: 8 Stepping: 6 Type: 0 Brand: 2
CPU Model: Pentium III-M (Coppermine) [cC0] Original OEM
Feature flags:
fpu vme de pse tsc msr pae mce cx8 sep mtrr pge mca cmov pat pse36 mmx fxsr sse
L1 Instruction cache:
Size: 16KB 4-way associative.
line size=32 bytes.
L1 Data cache:
Size: 16KB 4-way associative.
line size=32 bytes.
L2 unified cache:
Size: 256KB 8-way associative.
line size=32 bytes.
Instruction TLB: 4KB pages, 4-way associative, 32 entries
Instruction TLB: 4MB pages, fully associative, 2 entries
Found unknown cache descriptors: 01 02 03 04 08 0c 82
Data TLB: 4KB pages, 4-way associative, 64 entries
Data TLB: 4MB pages, 4-way associative, 8 entries
[編集]Pentium 4 650 (SL7Z7) 3.40GHz #「CPU Speed=3.40 GHz, Cache Size = 2 MB」で cpuid=0F43h (family / model / stepping) なので、 Intel® Pentium® 4 Processors 650 - SL7Z7 [編集]/proc/cpuinfo #
processor 1 は省略。 [編集]cpuid #cpuidコマンド $ cpuid eax in eax ebx ecx edx 00000000 00000005 756e6547 6c65746e 49656e69 00000001 00000f43 00020800 0000649d bfebfbff 00000002 605b5001 00000000 00000000 007d7040 00000003 00000000 00000000 00000000 00000000 00000004 00004121 01c0003f 0000001f 00000000 00000005 00000040 00000040 00000000 00000000 80000000 80000008 00000000 00000000 00000000 80000001 00000000 00000000 00000000 20100000 80000002 20202020 20202020 20202020 6e492020 80000003 286c6574 50202952 69746e65 52286d75 80000004 20342029 20555043 30342e33 007a4847 80000005 00000000 00000000 00000000 00000000 80000006 00000000 00000000 08006040 00000000 80000007 00000000 00000000 00000000 00000000 80000008 00003024 00000000 00000000 00000000 Vendor ID: "GenuineIntel"; CPUID level 5 Intel-specific functions: Version 00000f43: Type 0 - Original OEM Family 15 - Pentium 4 Extended family 0 Model 4 - Stepping 3 Reserved 0 Extended brand string: " Intel(R) Pentium(R) 4 CPU 3.40GHz" CLFLUSH instruction cache line size: 8 Hyper threading siblings: 2 Feature flags bfebfbff: FPU Floating Point Unit VME Virtual 8086 Mode Enhancements DE Debugging Extensions PSE Page Size Extensions TSC Time Stamp Counter MSR Model Specific Registers PAE Physical Address Extension MCE Machine Check Exception CX8 COMPXCHG8B Instruction APIC On-chip Advanced Programmable Interrupt Controller present and enabled SEP Fast System Call MTRR Memory Type Range Registers PGE PTE Global Flag MCA Machine Check Architecture CMOV Conditional Move and Compare Instructions FGPAT Page Attribute Table PSE-36 36-bit Page Size Extension CLFSH CFLUSH instruction DS Debug store ACPI Thermal Monitor and Clock Ctrl MMX MMX instruction set FXSR Fast FP/MMX Streaming SIMD Extensions save/restore SSE Streaming SIMD Extensions instruction set SSE2 SSE2 extensions SS Self Snoop HT Hyper Threading TM Thermal monitor 31 reserved TLB and cache info: 50: Instruction TLB: 4KB and 2MB or 4MB pages, 64 entries 5b: Data TLB: 4KB and 4MB pages, 64 entries 60: unknown TLB/cache descriptor 40: No 2nd-level cache, or if 2nd-level cache exists, no 3rd-level cache 70: Trace cache: 12K-micro-op, 4-way set assoc 7d: unknown TLB/cache descriptor Processor serial: 0000-0F43-0000-0000-0000-0000[編集] x86info #$ x86info x86info v1.21. Dave Jones 2001-2007 Feedback to <davej@redhat.com>. Found 2 CPUs -------------------------------------------------------------------------- CPU #1 /dev/cpu/0/cpuid: No such file or directory Family: 15 Model: 4 Stepping: 3 Type: 0 Brand: 0 CPU Model: Pentium 4 (Prescott) [N0] Original OEM Processor name string: Intel(R) Pentium(R) 4 CPU 3.40GHz Feature flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflsh ds acpi mmx fxsr sse sse2 ss ht tm pbe Extended feature flags: sse3 [2] monitor ds-cpl est cntx-id cx16 xTPR xd em64t Cache info Instruction trace cache: 12K uOps, 8-way associative. L1 Data cache: 16KB, sectored, 8-way associative. 64 byte line size. L2 unified cache: 2MB, sectored, 8-way associative. 64 byte line size. TLB info Instruction TLB: 4K, 2MB or 4MB pages, fully associative, 64 entries. Data TLB: 4KB or 4MB pages, fully associative, 64 entries. The physical package supports 2 logical processors -------------------------------------------------------------------------- CPU #2 (略) -------------------------------------------------------------------------- WARNING: Detected SMP, but unable to access cpuid driver. Used Uniprocessor CPU routines. Results inaccurate.[編集] Mobile Celeron 600MHz #[編集]/proc/cpuinfo #/proc/cpuinfo
cpuid #$ cpuid eax in eax ebx ecx edx 00000000 00000002 756e6547 6c65746e 49656e69 00000001 00000695 00000813 00000180 a7e9f9bf 00000002 02b3b001 00000000 00000000 2c043086 80000000 80000004 00000000 00000000 00000000 80000001 00000000 00000000 00000000 00000000 80000002 69626f4d 4920656c 6c65746e 20295228 80000003 656c6543 286e6f72 70202952 65636f72 80000004 726f7373 20202020 30303620 007a484d Vendor ID: "GenuineIntel"; CPUID level 2 Intel-specific functions: Version 00000695: Type 0 - Original OEM Family 6 - Pentium Pro Model 9 - Stepping 5 Reserved 0 Brand index: 19 [not in table] Extended brand string: "Mobile Intel(R) Celeron(R) processor 600MHz" CLFLUSH instruction cache line size: 8 Feature flags a7e9f9bf: FPU Floating Point Unit VME Virtual 8086 Mode Enhancements DE Debugging Extensions PSE Page Size Extensions TSC Time Stamp Counter MSR Model Specific Registers MCE Machine Check Exception CX8 COMPXCHG8B Instruction SEP Fast System Call MTRR Memory Type Range Registers PGE PTE Global Flag MCA Machine Check Architecture CMOV Conditional Move and Compare Instructions FGPAT Page Attribute Table CLFSH CFLUSH instruction DS Debug store ACPI Thermal Monitor and Clock Ctrl MMX MMX instruction set FXSR Fast FP/MMX Streaming SIMD Extensions save/restore SSE Streaming SIMD Extensions instruction set SSE2 SSE2 extensions TM Thermal monitor 31 reserved TLB and cache info: b0: unknown TLB/cache descriptor b3: unknown TLB/cache descriptor 02: Instruction TLB: 4MB pages, 4-way set assoc, 2 entries 86: unknown TLB/cache descriptor 30: unknown TLB/cache descriptor 04: Data TLB: 4MB pages, 4-way set assoc, 8 entries 2c: unknown TLB/cache descriptor[編集] x86info #$ x86info x86info v1.21. Dave Jones 2001-2007 Feedback to <davej@redhat.com>. Found 1 CPU -------------------------------------------------------------------------- Family: 6 Model: 9 Stepping: 5 Type: 0 Brand: 3 CPU Model: Pentium M (Banias) Original OEM Processor name string: Mobile Intel(R) Celeron(R) processor 600MHz Feature flags: fpu vme de pse tsc msr mce cx8 sep mtrr pge mca cmov pat clflsh ds acpi mmx fxsr sse sse2 tm pbe Extended feature flags: est tm2 Cache info L1 Instruction cache: 32KB, 8-way associative. 64 byte line size. L1 Data cache: 32KB, 8-way associative. 64 byte line size. L2 unified cache: 512KB, 4-way associative. 64 byte line size. TLB info Instruction TLB: 4K pages, 4-way associative, 128 entries. Instruction TLB: 4MB pages, fully associative, 2 entries Data TLB: 4K pages, 4-way associative, 128 entries. Data TLB: 4MB pages, 4-way associative, 8 entries[編集] Celeron M 900MHz #[編集]/proc/cpuinfo #/proc/cpuinfo
cpuid #$ cpuid eax in eax ebx ecx edx 00000000 00000002 756e6547 6c65746e 49656e69 00000001 00000695 00000812 00000000 a7e9f9bf 00000002 02b3b001 00000000 00000000 2c043086 80000000 80000004 00000000 00000000 00000000 80000001 00000000 00000000 00000000 00000000 80000002 65746e49 2952286c 6c654320 6e6f7265 80000003 20295228 7270204d 7365636f 20726f73 80000004 20202020 20202020 30303920 007a484d Vendor ID: "GenuineIntel"; CPUID level 2 Intel-specific functions: Version 00000695: Type 0 - Original OEM Family 6 - Pentium Pro Model 9 - Stepping 5 Reserved 0 Brand index: 18 [not in table] Extended brand string: "Intel(R) Celeron(R) M processor 900MHz" CLFLUSH instruction cache line size: 8 Feature flags a7e9f9bf: FPU Floating Point Unit VME Virtual 8086 Mode Enhancements DE Debugging Extensions PSE Page Size Extensions TSC Time Stamp Counter MSR Model Specific Registers MCE Machine Check Exception CX8 COMPXCHG8B Instruction SEP Fast System Call MTRR Memory Type Range Registers PGE PTE Global Flag MCA Machine Check Architecture CMOV Conditional Move and Compare Instructions FGPAT Page Attribute Table CLFSH CFLUSH instruction DS Debug store ACPI Thermal Monitor and Clock Ctrl MMX MMX instruction set FXSR Fast FP/MMX Streaming SIMD Extensions save/restore SSE Streaming SIMD Extensions instruction set SSE2 SSE2 extensions TM Thermal monitor 31 reserved TLB and cache info: b0: unknown TLB/cache descriptor b3: unknown TLB/cache descriptor 02: Instruction TLB: 4MB pages, 4-way set assoc, 2 entries 86: unknown TLB/cache descriptor 30: unknown TLB/cache descriptor 04: Data TLB: 4MB pages, 4-way set assoc, 8 entries 2c: unknown TLB/cache descriptor[編集] x86info #$ x86info x86info v1.21. Dave Jones 2001-2007 Feedback to <davej@redhat.com>. Found 1 CPU -------------------------------------------------------------------------- Family: 6 Model: 9 Stepping: 5 Type: 0 Brand: 2 CPU Model: Pentium M (Banias) Original OEM Processor name string: Intel(R) Celeron(R) M processor 900MHz Feature flags: fpu vme de pse tsc msr mce cx8 sep mtrr pge mca cmov pat clflsh ds acpi mmx fxsr sse sse2 tm pbe Extended feature flags: Cache info L1 Instruction cache: 32KB, 8-way associative. 64 byte line size. L1 Data cache: 32KB, 8-way associative. 64 byte line size. L2 unified cache: 512KB, 4-way associative. 64 byte line size. TLB info Instruction TLB: 4K pages, 4-way associative, 128 entries. Instruction TLB: 4MB pages, fully associative, 2 entries Data TLB: 4K pages, 4-way associative, 128 entries. Data TLB: 4MB pages, 4-way associative, 8 entries[編集] Pentium M 733J (Dothan) #[編集]/proc/cpuinfo #/proc/cpuinfo
cpuid #$ cpuid eax in eax ebx ecx edx 00000000 00000002 756e6547 6c65746e 49656e69 00000001 000006d8 00000816 00000180 afe9f9ff 00000002 02b3b001 000000f0 00000000 2c04307d 80000000 80000008 00000000 00000000 00000000 80000001 00000000 00000000 00000000 00100000 80000002 20202020 20202020 65746e49 2952286c 80000003 6e655020 6d756974 20295228 7270204d 80000004 7365636f 20726f73 30312e31 007a4847 80000005 00000000 00000000 00000000 00000000 80000006 00000000 00000000 08006040 00000000 80000007 00000000 00000000 00000000 00000000 80000008 00002020 00000000 00000000 00000000 Vendor ID: "GenuineIntel"; CPUID level 2 Intel-specific functions: Version 000006d8: Type 0 - Original OEM Family 6 - Pentium Pro Model 13 - Stepping 8 Reserved 0 Brand index: 22 [not in table] Extended brand string: " Intel(R) Pentium(R) M processor 1.10GHz" CLFLUSH instruction cache line size: 8 Feature flags afe9f9ff: FPU Floating Point Unit VME Virtual 8086 Mode Enhancements DE Debugging Extensions PSE Page Size Extensions TSC Time Stamp Counter MSR Model Specific Registers PAE Physical Address Extension MCE Machine Check Exception CX8 COMPXCHG8B Instruction SEP Fast System Call MTRR Memory Type Range Registers PGE PTE Global Flag MCA Machine Check Architecture CMOV Conditional Move and Compare Instructions FGPAT Page Attribute Table CLFSH CFLUSH instruction DS Debug store ACPI Thermal Monitor and Clock Ctrl MMX MMX instruction set FXSR Fast FP/MMX Streaming SIMD Extensions save/restore SSE Streaming SIMD Extensions instruction set SSE2 SSE2 extensions SS Self Snoop TM Thermal monitor 31 reserved TLB and cache info: b0: unknown TLB/cache descriptor b3: unknown TLB/cache descriptor 02: Instruction TLB: 4MB pages, 4-way set assoc, 2 entries f0: unknown TLB/cache descriptor 7d: unknown TLB/cache descriptor 30: unknown TLB/cache descriptor 04: Data TLB: 4MB pages, 4-way set assoc, 8 entries 2c: unknown TLB/cache descriptor[編集] x86info #$ x86info x86info v1.24. Dave Jones 2001-2009 Feedback to <davej@redhat.com>. Found 1 CPU -------------------------------------------------------------------------- EFamily: 0 EModel: 0 Family: 6 Model: 13 Stepping: 8 CPU Model: Pentium M (Dothan) [C-0] Processor name string: Intel(R) Pentium(R) M processor 1.10GHz Type: 0 (Original OEM) Brand: 6 (Mobile IntelR PentiumR III processor) Number of cores per physical package=1 Number of logical processors per socket=1 Number of logical processors per core=1 APIC ID: 0x0 Package: 0 Core: 0 SMT ID 0[編集] Xeon 3050 2.13GHz #[編集]/proc/cpuinfo #/proc/cpuinfo
processor 1は省略。 [編集]cpuid #$ cpuid eax in eax ebx ecx edx 00000000 0000000a 756e6547 6c65746e 49656e69 00000001 000006f6 00020800 0000e3bd bfebfbff 00000002 05b0b101 005657f0 00000000 2cb4307d 00000003 00000000 00000000 00000000 00000000 00000004 04000121 01c0003f 0000003f 00000001 00000005 00000040 00000040 00000003 00000020 00000006 00000001 00000002 00000001 00000000 00000007 00000000 00000000 00000000 00000000 00000008 00000400 00000000 00000000 00000000 00000009 00000000 00000000 00000000 00000000 0000000a 07280202 00000000 00000000 00000000 80000000 80000008 00000000 00000000 00000000 80000001 00000000 00000000 00000001 20100000 80000002 65746e49 2952286c 6f655820 2952286e 80000003 55504320 20202020 20202020 20202020 80000004 30353033 20402020 33312e32 007a4847 80000005 00000000 00000000 00000000 00000000 80000006 00000000 00000000 08006040 00000000 80000007 00000000 00000000 00000000 00000000 80000008 00003024 00000000 00000000 00000000 Vendor ID: "GenuineIntel"; CPUID level 10 Intel-specific functions: Version 000006f6: Type 0 - Original OEM Family 6 - Pentium Pro Model 15 - Extended model 0 Stepping 6 Reserved 0 Extended brand string: "Intel(R) Xeon(R) CPU 3050 @ 2.13GHz" CLFLUSH instruction cache line size: 8 Hyper threading siblings: 2 Feature flags bfebfbff: FPU Floating Point Unit VME Virtual 8086 Mode Enhancements DE Debugging Extensions PSE Page Size Extensions TSC Time Stamp Counter MSR Model Specific Registers PAE Physical Address Extension MCE Machine Check Exception CX8 COMPXCHG8B Instruction APIC On-chip Advanced Programmable Interrupt Controller present and enabled SEP Fast System Call MTRR Memory Type Range Registers PGE PTE Global Flag MCA Machine Check Architecture CMOV Conditional Move and Compare Instructions FGPAT Page Attribute Table PSE-36 36-bit Page Size Extension CLFSH CFLUSH instruction DS Debug store ACPI Thermal Monitor and Clock Ctrl MMX MMX instruction set FXSR Fast FP/MMX Streaming SIMD Extensions save/restore SSE Streaming SIMD Extensions instruction set SSE2 SSE2 extensions SS Self Snoop HT Hyper Threading TM Thermal monitor 31 reserved TLB and cache info: b1: unknown TLB/cache descriptor b0: unknown TLB/cache descriptor 05: unknown TLB/cache descriptor f0: unknown TLB/cache descriptor 57: unknown TLB/cache descriptor 56: unknown TLB/cache descriptor 7d: unknown TLB/cache descriptor 30: unknown TLB/cache descriptor b4: unknown TLB/cache descriptor 2c: unknown TLB/cache descriptor Processor serial: 0000-06F6-0000-0000-0000-0000[編集] x86info #$ x86info x86info v1.21. Dave Jones 2001-2007 Feedback to <davej@redhat.com>. Found 2 CPUs -------------------------------------------------------------------------- CPU #1 /dev/cpu/0/cpuid: No such file or directory Family: 6 Model: 15 Stepping: 6 Type: 0 Brand: 0 CPU Model: Core 2 Duo E6400 [B2] Original OEM Feature flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflsh ds acpi mmx fxsr sse sse2 ss ht tm pbe Extended feature flags: sse3 [2] monitor ds-cpl vmx est tm2 ssse3 cx16 xTPR [15] xd em64t lahf_lm Cache info L1 Instruction cache: 32KB, 8-way associative. 64 byte line size. L1 Data cache: 32KB, 8-way associative. 64 byte line size. L2 unified cache: 2MB, sectored, 8-way associative. 64 byte line size. TLB info Instruction TLB: 4x 4MB page entries, or 8x 2MB pages entries, 4-way associative Instruction TLB: 4K pages, 4-way associative, 128 entries. Data TLB: 4MB pages, 4-way associative, 32 entries L0 Data TLB: 4MB pages, 4-way set associative, 16 entries L0 Data TLB: 4MB pages, 4-way set associative, 16 entries Data TLB: 4K pages, 4-way associative, 256 entries. 64 byte prefetching. The physical package supports 2 logical processors -------------------------------------------------------------------------- CPU #2 (略) -------------------------------------------------------------------------- WARNING: Detected SMP, but unable to access cpuid driver. Used Uniprocessor CPU routines. Results inaccurate.[編集] Core2 Quad Q6700 #[編集]/proc/cpuinfo #/proc/cpuinfo
processor 1, 2, 3 は省略。 [編集]cpuid #$ cpuid eax in eax ebx ecx edx 00000000 0000000a 756e6547 6c65746e 49656e69 00000001 000006fb 01040800 0000e3bd bfebfbff 00000002 05b0b101 005657f0 00000000 2cb43049 00000003 00000000 00000000 00000000 00000000 00000004 0c000121 01c0003f 0000003f 00000001 00000005 00000040 00000040 00000003 00000020 00000006 00000001 00000002 00000001 00000000 00000007 00000000 00000000 00000000 00000000 00000008 00000400 00000000 00000000 00000000 00000009 00000000 00000000 00000000 00000000 0000000a 07280202 00000000 00000000 00000503 80000000 80000008 00000000 00000000 00000000 80000001 00000000 00000000 00000001 20100000 80000002 65746e49 2952286c 726f4320 4d542865 80000003 51203229 20646175 20555043 51202020 80000004 30303736 20402020 36362e32 007a4847 80000005 00000000 00000000 00000000 00000000 80000006 00000000 00000000 10008040 00000000 80000007 00000000 00000000 00000000 00000000 80000008 00003024 00000000 00000000 00000000 Vendor ID: "GenuineIntel"; CPUID level 10 Intel-specific functions: Version 000006fb: Type 0 - Original OEM Family 6 - Pentium Pro Model 15 - Extended model 0 Stepping 11 Reserved 0 Extended brand string: "Intel(R) Core(TM)2 Quad CPU Q6700 @ 2.66GHz" CLFLUSH instruction cache line size: 8 Initial APIC ID: 1 Hyper threading siblings: 4 Feature flags bfebfbff: FPU Floating Point Unit VME Virtual 8086 Mode Enhancements DE Debugging Extensions PSE Page Size Extensions TSC Time Stamp Counter MSR Model Specific Registers PAE Physical Address Extension MCE Machine Check Exception CX8 COMPXCHG8B Instruction APIC On-chip Advanced Programmable Interrupt Controller present and enabled SEP Fast System Call MTRR Memory Type Range Registers PGE PTE Global Flag MCA Machine Check Architecture CMOV Conditional Move and Compare Instructions FGPAT Page Attribute Table PSE-36 36-bit Page Size Extension CLFSH CFLUSH instruction DS Debug store ACPI Thermal Monitor and Clock Ctrl MMX MMX instruction set FXSR Fast FP/MMX Streaming SIMD Extensions save/restore SSE Streaming SIMD Extensions instruction set SSE2 SSE2 extensions SS Self Snoop HT Hyper Threading TM Thermal monitor 31 reserved TLB and cache info: b1: unknown TLB/cache descriptor b0: unknown TLB/cache descriptor 05: unknown TLB/cache descriptor f0: unknown TLB/cache descriptor 57: unknown TLB/cache descriptor 56: unknown TLB/cache descriptor 49: unknown TLB/cache descriptor 30: unknown TLB/cache descriptor b4: unknown TLB/cache descriptor 2c: unknown TLB/cache descriptor Processor serial: 0000-06FB-0000-0000-0000-0000[編集] x86info #$ x86info x86info v1.21. Dave Jones 2001-2007 Feedback to <davej@redhat.com>. Found 4 CPUs -------------------------------------------------------------------------- CPU #1 /dev/cpu/0/cpuid: No such file or directory Family: 6 Model: 15 Stepping: 11 Type: 0 Brand: 0 CPU Model: Core 2 Duo [G0] Original OEM Feature flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflsh ds acpi mmx fxsr sse sse2 ss h t tm pbe Extended feature flags: sse3 [2] monitor ds-cpl vmx est tm2 ssse3 cx16 xTPR [15] xd em64t lahf_lm Cache info L1 Instruction cache: 32KB, 8-way associative. 64 byte line size. L1 Data cache: 32KB, 8-way associative. 64 byte line size. L2 unified cache: 4MB, 16-way associative. 64 byte line size. TLB info Instruction TLB: 4x 4MB page entries, or 8x 2MB pages entries, 4-way associative Instruction TLB: 4K pages, 4-way associative, 128 entries. Data TLB: 4MB pages, 4-way associative, 32 entries L0 Data TLB: 4MB pages, 4-way set associative, 16 entries L0 Data TLB: 4MB pages, 4-way set associative, 16 entries Data TLB: 4K pages, 4-way associative, 256 entries. 64 byte prefetching. The physical package supports 4 logical processors -------------------------------------------------------------------------- CPU #2 （略） -------------------------------------------------------------------------- CPU #3 （略） -------------------------------------------------------------------------- CPU #4 （略） -------------------------------------------------------------------------- WARNING: Detected SMP, but unable to access cpuid driver. Used Uniprocessor CPU routines. Results inaccurate.[編集] Core2 Quad Q9550 #[編集]/proc/cpuinfo #/proc/cpuinfo
processor 1, 2, 3 は省略。 |